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GaN component technology development and single-chip integrated circuit development and challenges Chen Kehong, chair professor of the Department of Electrical Engineering, National Yangming Chiao Tung University, at the SEMICON TAIWAN 2022 Power and Optoelectronic Semiconductor Forum, specifically explained the current problems encountered in the development of GaN component technology and how to overcome the technical challenges faced by GaN single-chip integrated circuits. The following is a summary of the wonderful speech: Grand Challenges in GaN Component Technology Development Since the GaN substrate manufacturing technology is still in continuous development, the current method widely used by the industry is to grow GaN epitaxy on a 6-inch silicon wafer, and simultaneously develop the technology to grow it on an 8-inch wafer. Once this technology matures, the production cost of the substrate can be greatly reduced. However, the large difference between the lattice constants of the silicon substrate and GaN will lead to the existence of too many lattice defects, which will lead to poor device performance or low yield and cannot be mass-produced. Therefore, some manufacturers try to grow GaN on the SiC substrate. Although the defect density of the substrate is reduced, the production cost is greatly increased. On the other hand, the high electron mobility field effect transistor (HEMT) made of GaN has the characteristics of high voltage operation, low parasitic capacitance, low on-resistance, and reverse recovery current close to zero, so it is suitable for high-frequency and high power density operation. At present, GaN HEMTs are mainly divided into two types of transistor structures: enhanced (E-mode or called off in normal state) transistors, and depletion type (D-mode or called in normal state turned on) transistors. The main manufacturers of E-mode transistors include GaN Systems and Navitas; the D-mode transistors are produced by Transphorm and Texas Instruments respectively. Although the E-mode GaN HEMT is easier to operate than the D-mode GaN HEMT, the change of the threshold voltage with temperature is larger than that of the D-mode GaN HEMT, resulting in slower speed or even circuit failure when operating at high temperature status. The D-mode GaN HEMT needs an additional drive circuit to convert it into E-mode operation. The main defect of GaN HEMT is that when the operating temperature rises, hot carriers will be injected from the channel into the AlGaN and Buffer layer, which further leads to a decrease in current. Another problem is mentioned above. There are many defects formed by epitaxial growth in the buffer layer of GaN and silicon wafers. This part will also inhibit the flow of current and increase the on-resistance. Therefore, starting from the design of the driving circuit, how to make up for the influence caused by these defects, so that the GaN HEMT can operate stably at high temperature, has become a current hot research topic. In addition, it is also one of the important projects currently integrating GaN single-chip circuits to detect whether there is a short circuit in the component, which may cause the risk of component damage, and then activate the protection circuit to protect the component. Equipped with a current sensor is currently considered the best protection method in the industry. Under inductive load operation, components will cause instantaneous surge due to the inductive effect at the moment of switching, which will cause a large power consumption and the risk of damage to components. Therefore, a circuit for detecting surges is required to protect components.
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